A Stanford University research group led by Professors Nishi and Saraswat has fabricated a high-performance germanium NMOS device which is projected to significantly exceed the drain current goals of the ITRS HP 22nm by utilizing Tokyo Electron Limited (TEL ) Slot Plane Antenna (SPA) radical oxidation technology. The technical details of their research will be reviewed at the 2009 Symposium on VLSI Technology, to be held on June 15 17, in Kyoto, Japan, in a paper titled High Quality GeO2/Ge Interface Formed by SPA Radical Oxidation and Uniaxial Stress Engineering for High Performance Ge NMOSFETs.



Based on the experimental work, germanium NMOSFETs with High-k Metal Gate stack are expected to significantly exceed the HP22nm drain current specifications outlined in the ITRS HP 22nm node. TELs SPA radical oxidation technology has been used to improve the interfacial germanium dioxide (GeO2) layer of the High-k Gate stack. Stanford University researchers have confirmed that the GeO2 film formed by SPA radical oxidation exhibits: (1) orientation independence, (2) small temperature dependent oxidation, (3) smooth interface and (4) low interface state density. 　A uniaxial stress mobility enhancement technology has been also applied to the Ge-NMOSFET.



The Trias SPA series is widely used in the advanced memory and logic device manufacturing fields. The systems low temperature and low-damage plasma process technologies are characterized by high plasma density, low electron temperatures and exceptional film uniformity. Cultivated by TEL for eight years, the SPA series provides damage-free processing in advanced radical oxidation and nitridation applications.



Takeshi Okubo, General Manager for TELs Single Wafer Deposition Business Unit, states, It has been proven by Stanford University that SPA technology is a promising low temperature radical reaction technology for next generation semiconductor process technologies such as Ge semiconductors and three dimensional structural devices.